Please use this identifier to cite or link to this item:
                
    
    http://localhost:8080/jspui/handle/123456789/1243Full metadata record
| DC Field | Value | Language | 
|---|---|---|
| dc.contributor.author | UOM Engineering Question Papers | - | 
| dc.date.accessioned | 2021-08-17T06:44:22Z | - | 
| dc.date.available | 2021-08-17T06:44:22Z | - | 
| dc.date.issued | 2021-08-17 | - | 
| dc.identifier.uri | http://localhost:8080/jspui/handle/123456789/1243 | - | 
| dc.language.iso | en | en_US | 
| dc.subject | Digital Logic Circuits | en_US | 
| dc.subject | C Scheme R2019 | en_US | 
| dc.title | Digital Logic Circuits QP DSE JUN2021 | en_US | 
| dc.type | Other | en_US | 
| Appears in Collections: | JUN 2021 DSE | |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| DSE III ETRX DLC R2019 Jun2021.pdf | 394.17 kB | Adobe PDF | View/Open | 
Items in Somaiya Vidyavihar Digital Repository are protected by copyright, with all rights reserved, unless otherwise indicated.