Header
Please use this identifier to cite or link to this item: http://localhost:8080/jspui/handle/123456789/4859
Full metadata record
DC FieldValueLanguage
dc.contributor.authorAutonomous Engineering Question Papers-
dc.date.accessioned2025-12-12T05:50:32Z-
dc.date.available2025-12-12T05:50:32Z-
dc.date.issued2025-12-12-
dc.identifier.urihttp://localhost:8080/jspui/handle/123456789/4859-
dc.language.isoenen_US
dc.subjectMSVLSIDen_US
dc.subjectEXDLC6053en_US
dc.titleMixed Signal VLSI Design QP May2025en_US
dc.typeOtheren_US
Appears in Collections:MAY 2025 Scheme IIB 2023-24

Files in This Item:
File Description SizeFormat 
EXTC SEM VI EXDLC6053 MVLSI MAY 25.pdf360.91 kBAdobe PDFView/Open


Items in Somaiya Vidyavihar Digital Repository are protected by copyright, with all rights reserved, unless otherwise indicated.