Please use this identifier to cite or link to this item:
http://localhost:8080/jspui/handle/123456789/921
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | UOM Engineering Question Papers | - |
dc.date.accessioned | 2021-05-02T13:33:46Z | - |
dc.date.available | 2021-05-02T13:33:46Z | - |
dc.date.issued | 2021-05-02 | - |
dc.identifier.uri | http://localhost:8080/jspui/handle/123456789/921 | - |
dc.language.iso | en | en_US |
dc.subject | Digital Logic Circuits | en_US |
dc.subject | C Scheme R2019 | en_US |
dc.title | Digital Logic Circuits QP JAN2021 | en_US |
dc.type | Other | en_US |
Appears in Collections: | JAN 2021 |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
SE III ETRX DLC R2019 Jan21.pdf | 588.19 kB | Adobe PDF | View/Open |
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